Digitally adjustable phase shifting circuit

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328 14, 328 15, 328 55, 364851, H03L 718, H03K 1302, H03K 402, H03K 3017

Patent

active

042950988

ABSTRACT:
A counter produces, as a function of time, an M bit count of cycles of a periodic signal. A storage device stores a changeable value represented by N bits comprising M higher order bits and N-M lower order bits. An adder produces M bits corresponding to the sum of M counter bits and M higher order bits. A digital-to-analog converter produces an alternating signal corresponding to the value of the M summed bits and N-M lower order bits where the phase of the alternating signal relative to an arbitrary reference signal corresponds to the value stored in the storage device.

REFERENCES:
patent: 3325721 (1967-06-01), Clark
patent: 3500213 (1970-03-01), Ameau
patent: 3792360 (1974-02-01), Carlow
patent: 4061909 (1977-12-01), Bryant

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