Power-on-reset circuit including integration capacitor

Details Power-on-reset circuit including integration capacitor Power-on-reset circuit including integration capacitor

1991-07-10

1992-11-24

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307296, 307 1, 3072963, 3072964, 3072968, 3075421, H03K 301, H03K 1756

Patent

active

051665450

ABSTRACT:
A power-on reset circuit, which includes a fully symmetrical flip-flop in the path of propagation of the reset pulse. The two outputs of the flip-flop are combined together, so that propagation of the pulse can occur as soon as the flip-flop has stabilized in either of its possible stable states. However, a feedback connection cuts off any further propagation through this path once a power-on reset pulse has been issued. Thus, this circuit is extremely stable, and will not issue further power-on reset pulses even if hit with a very severe power glitch.

REFERENCES:
patent: 4140930 (1979-02-01), Tanaka
patent: 4142114 (1979-02-01), Green
patent: 4874965 (1989-10-01), Campardo et al.
patent: 4970408 (1990-11-01), Hanke et al.
patent: 5027008 (1991-06-01), Runaldue
patent: 5039875 (1991-08-01), Chang
IBM Tech. Disc. Bul. vol. 14, No. 8, Jan. 1972, "Bouncing Switch Output to Single-Pulse Converter in 4-Phase Logic", Radzik.

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