Carry circuit suitable for a high-speed arithmetic operation

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364787, G06F 750

Patent

active

047632950

ABSTRACT:
A carry circuit used in an arithmetic unit, such as an adder or a subtractor, has to process a carry operation for producing a carry signal to be transferred to the following carry operation stage according to a carry signal transferred from the previous carry operation stage. To process this carry operation at a high speed, an improved carry circuit performs two operations before the carry signal from the previous stage is received. One of the operations is processed by using a signal representing that the carry signal from the previous stage is present. The other operation is processed by using another signal representing that the carry signal from the previous stage is absent. These two operations have been terminated when the carry signal from the previous stage is received. The carry signal from the previous stage is used to select either one of results of the two operations. Thus, transmission of a carry signal to the following stage can be performed at a high speed.

REFERENCES:
patent: 3717755 (1973-02-01), Briley
patent: 3728532 (1973-04-01), Pryor
patent: 3843876 (1974-10-01), Fette et al.
patent: 4152775 (1979-05-01), Schwartz
patent: 4425623 (1984-01-01), Russell
patent: 4504924 (1985-03-01), Cook et al.

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