Resynthesis and retiming for optimum partial scan testing

Details Resynthesis and retiming for optimum partial scan testing Resynthesis and retiming for optimum partial scan testing

1993-12-01

1996-03-26

Trans, Vincent N.

Boots, shoes, and leggings

364488, 371 223, G01R 3128

Patent

active

055026478

ABSTRACT:
A partial scan methodology selects scan flip flops (FFs) in the minimum feedback vertex set (MFVS) of the FF dependency graph so that all loops, except self-loops, are broken. The MFVS of the circuit, i.e. the minimum quantity of gates whose removal makes the circuit acyclic, is a lower bound and in many cases is significantly smaller than the MFVS of the dependency graph. Since only FFs arc considered for scan, FFs are repositioned so that, in a modified circuit, every circuit MFVS gate drives one FF that can be scanned. A method is disclosed by which resynthesis and retiming can always transform any circuit into an equivalent circuit whose FF dependency graph MFVS is equal to the MFVS of the original circuit. Therefore, the MFVS of a circuit is a lower bound on the quantity of scan FFs needed. The necessary and sufficient conditions under which legal retiming can produce the desired FF repositioning are identified. Novel resynthesis transformations are used to modify circuits that do not satisfy these conditions. The modified circuits can always be retimed to achieve the desired FF repositioning. The result is a modified circuit which performs equivalent to the original circuit, but requires fewer scan FFs than the original circuit.

REFERENCES:
patent: 5043986 (1991-08-01), Agrawal et al.
patent: 5132974 (1992-07-01), Rosales
patent: 5166604 (1992-11-01), Ahanin et al.
patent: 5329533 (1994-07-01), Lin
D. Kagaris et al, "Partial Scan with Retiming", in Proc. Design Automation Conference, pp. 249-254, 1993.
D. H. Lee et al, "On Determining Scan Flip-Flops in Partial Scan Designs", in Proc. of the Int'l. Conf. on CAD, pp. 322-325, Nov. 1990.
V. Chickermane et al, "An Optimization Based Approach to the Partial Scan Design Problem", in Proc. of an Int'l Test Conf., pp. 377-386, Sep. 1990.

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