Fishing – trapping – and vermin destroying
Patent
1992-12-31
1994-12-27
Breneman, R. Bruce
Fishing, trapping, and vermin destroying
H01L 2102
Patent
active
053765931
ABSTRACT:
A method for fabricating semiconductor wafers is disclosed, wherein a semiconductor substrate is provided in a chamber. Subsequently, a first silicon nitride layer is formed in situ under high pressure superjacent the substrate by introducing a gas containing nitrogen, preferably NH.sub.3 combined with N.sub.2, at a temperature within the range of 850.degree. C. to 1150.degree. C. for approximately 10 to 60 seconds. This results in the first layer having a thickness in the approximate range of 5 .ANG. to 30 .ANG.. A semiconductor film is then deposited in situ under high pressure superjacent the first silicon nitride layer, preferably by means of Rapid Thermal Processing Chemical Vapor Deposition ("RTPCVD"). In an alternate embodiment of the present invention, this is accomplished by either Low Pressure Chemical Vapor Deposition ("LPCVD") or Molecular Beam Epitaxy ("MBE"). The thickness of the film is in the approximate range of 10 .ANG. to 40 .ANG.. Consequently, the film is transformed in situ under high pressure into a second silicon nitride layer by introducing a gas containing nitrogen, preferably NH.sub.3 combined with N.sub.2, at a temperature substantially within the range of 850.degree. C. to 1150.degree. C. applied for approximately 10 to 60 seconds. The thickness of the second silicon nitride layer is substantially in the range of the thickness of the film. In one embodiment of the present invention, only a portion of the film is transformed into a second silicon nitride layer, thereby creating a remainder of the film subjacent the second silicon nitride layer. In this embodiment, the thickness of the second silicon nitride layer is less than the thickness of the film. Finally, a second semiconductor film is deposited superjacent the second layer in situ under high pressure. In one alternate embodiment of the present invention, a pair of silicon dioxide layers are grown between the step of providing a semiconductor substrate and the step of depositing a second semiconductor film.
REFERENCES:
patent: 4277320 (1981-07-01), Beguwala
patent: 4435447 (1984-03-01), Ito
patent: 4996081 (1991-02-01), Ellul
patent: 5032545 (1991-07-01), Doan
patent: 5173152 (1992-12-01), Tanaka
patent: 5250452 (1993-10-01), Ozturk
Moselehi "Thermal Nitridation of Si and SiO.sub.2 for VLSI" IEEE Tranasaction on Electron Devices, vol. ED-32 No. 2 Feb. 1985 pp. 106-123.
Nolf "Silicon Processing for the VLSI Era" vol. 1-Lattice Press pp. 156-157, 1986.
Sandhu Gurtej S.
Thakur Randhir P. S.
Breneman R. Bruce
Chang Joni Y.
Micron Semiconductor Inc.
Pappas Lia M.
LandOfFree
Method for fabricating stacked layer Si.sub.3 N.sub.4 for low le does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for fabricating stacked layer Si.sub.3 N.sub.4 for low le, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating stacked layer Si.sub.3 N.sub.4 for low le will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-919347