Microprocessor with strip layout of busses, ALU and registers

Details Microprocessor with strip layout of busses, ALU and registers Microprocessor with strip layout of busses, ALU and registers

1980-11-24

1983-08-30

Chan, Eddie P.

Boots, shoes, and leggings

357 68, 357 45, G06F 100, G06F 900, H01L 2700

Patent

active

044020449

ABSTRACT:
A single-chip microprocessor device of the MOS/LSI type contains an ALU, several interal busses, a number of address/data registers, and an instruction register with associated control decode or microcontrol generator circuitry. The device communicates with external memory and peripherals by a bidirectional multiplexed address/data bus and a number of control lines. A 16-bit device is shown as an example. The ALU and registers are laid out on the chip in a regular pattern with like bits in all registers and ALU aligned, and the busses are parallel metal strips overlying each of the strips of ALU/register bits. Controls are polysilicon lines perpendicular to the busses. A very dense layout results, saving space on the chip.

REFERENCES:
patent: 3968478 (1976-07-01), Mensch, Jr.
patent: 3987418 (1976-10-01), Buchanan
patent: 4032962 (1977-06-01), Balyoz et al.
patent: 4144561 (1979-03-01), Tu et al.
patent: 4212026 (1980-07-01), Balasubramanian et al.
patent: 4249193 (1981-02-01), Balyoz et al.
patent: 4295149 (1981-10-01), Balyoz et al.

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