Disk address controller

Details Disk address controller Disk address controller

1977-11-10

1980-07-29

Shaw, Gareth D.

Boots, shoes, and leggings

G06F 1304, G06F 306, G06F 738

Patent

active

042154006

ABSTRACT:
A disk address controller includes: a random access memory for storing the upper and lower limit addresses of the access area of each of processing units which are allotted to a disk unit, and storing the disk address specified by a disk input/output instruction from the processing unit; a read only memory for storing a microprogram corresponding to the disk input/output instruction; a microprocessor for executing the microprogram; disk channel units provided corresponding to the respective disk units; and a direct memory access control unit for performing data transfer with the disk unit via the disk channel. The disk address controller sets up the upper and lower addresses of the area arbitrarily allotted to the disk unit by the processing unit. When the real address which is the sum of the lower limit address and the disk address specified by the disk input/output instruction fed from the processing unit to the disk address controller, falls within the access area, the disk input/output instruction in executed by using the real disk address, while the real disk address exists outside the access area, an error interruption is made into the processing unit.

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