System and process for efficiently determining absolute memory a

Details System and process for efficiently determining absolute memory a System and process for efficiently determining absolute memory a

1997-09-23

1999-07-06

Hafiz, Tariq R.

G06F 9445

Patent

active

059207221

ABSTRACT:
A system and process for efficiently determining absolute addresses for an intermediate code model of an address space are described. A processor interfaces to a main memory comprising a plurality of addressable locations. Each such addressable location is referenced by an absolute address having a maximum size directly proportional to the total number of the addressable locations in the main memory. The absolute addresses form the address space. Source code is supplied specifying program routines which each include at least one reference to an absolute address within the address space. A translator interfaces with the main memory and the storage device. Object code is generated from the source code program routines. Each such absolute address reference in the source code program routines is instantiated with a code sequence for referencing a subset of the address space. Each such absolute address in the address space subset has a total size smaller than the maximum size and is directly proportional to the total number of the addressable locations in the address space subset. The absolute addresses in the address space subset form the intermediate code model. The translated source code is stored with the instantiated code sequence as object code for execution by the processor.

REFERENCES:
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patent: 5414821 (1995-05-01), Nguyen et al.
patent: 5809306 (1998-09-01), Suzuki et al.

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