Static information storage and retrieval – Floating gate – Particular biasing
Patent
1997-11-12
1999-07-06
Nguyen, Tan T.
Static information storage and retrieval
Floating gate
Particular biasing
36518503, G11C 1600
Patent
active
059205075
ABSTRACT:
A non-volatile semiconductor memory device comprising a memory cell array having a plurality of electrically writable memory cells arranged in a matrix form, each of the memory cells having three or more logic states so as to store a multi-value data "i" (i=0, 1, . . . , n-1: n.gtoreq.3), a plurality of data latch circuits for temporarily storing data controlling a write state of the plurality of memory cells of the memory array, write verify circuit for confirming the write state of the plurality of memory cells, and an "i" data batch verify circuit for batch-detecting whether or not the memory cell where data "i" should be written reaches a memory state of data "i."
REFERENCES:
patent: 5163021 (1992-11-01), Mehrotra et al.
patent: 5172338 (1992-12-01), Mehrotra et al.
patent: 5495442 (1996-02-01), Lernea et al.
patent: 5521865 (1996-05-01), Ohuchi et al.
patent: 5539690 (1996-07-01), Talreja et al.
patent: 5570315 (1996-10-01), Tanaka et al.
patent: 5596526 (1997-01-01), Assar et al.
patent: 5764571 (1998-06-01), Banks
Takeuchi Ken
Tanaka Tomoharu
Kabushiki Kaisha Toshiba
Nguyen Tan T.
LandOfFree
Nonvolatile semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Nonvolatile semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Nonvolatile semiconductor memory device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-904399