Communication switching element and method for transmitting vari

Details Communication switching element and method for transmitting vari Communication switching element and method for transmitting vari

1990-08-09

1993-05-25

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

370 941, H04L 1256, H04J 316

Patent

active

052146391

ABSTRACT:
The switching element is used for transferring, between X inputs (I1-IX) and Y outputs (O1-OY), cells divided into subcells of which only the first contains information about the destination output(s) of the cell. This switching element includes: a buffer memory (BM) with a plurality (C) of memory locations each having an address (K); and a memory management means (BMMU) for providing (FMLMC) addresses of free memory locations for storing the subcells therein, and for storing (BQ1-BQY, SLM), under the form of linked lists, the memory location addresses used by the subcells, each list being associated to a distinct cell. The method is adapted to process variable length cells divided into subcells each containing a header (SCH) to distinguish a first/last subcell (FSC/LSC) of a cell from other subcells (ISC, LSC). Use is made of a subcell logic (SL) to detect the succession in either order of a subcell pertaining to a cell and of either a first/last subcell (FSC/LSC) of another cell or an idle subcell so as to identify the last/first subcell (LSC/FSC) of a cell.

REFERENCES:
patent: 4920534 (1990-04-01), Adelmann et al.
patent: 4947388 (1990-08-01), Kuwahara et al.
patent: 5050166 (1991-09-01), Cantoni et al.
Y. Tamir, et al., "High-Performance Multi-Queue Buffers for VLSI Communication . . . ", UCLA Comp. Sci. Dept., IEEE, 1988, pp. 343-354.
"A shared buffer memory switch for an ATM exchange", by H. Kuwahara et al. ICC 1989 Conf. Jun. 11-14, 1989 Boston, pp. 118-122.
"The Bell System--Technical Journal" vol. XLIII, No. 5, part I, Sep. 1964, pp. 1869-1870.

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