Method and circuit for producing high-speed counts

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G06F 104

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active

059565020

ABSTRACT:
A counter circuit includes a series of registers driven by two phase shifted clocks. A clock generator in the counter circuit generates four asymmetrical clock signals to drive each of the registers. The registers are formed from input and output stages, each having two sets of switches. The first set of switches in each stage provides a supply voltage to a stage output in response to the asymmetrical clocks. The second set of switches supply ground to the stage output in response to the asymmetrical clocks. To accelerate response of the switching circuits, isolation switches decouple the first set of switches in each pair from the stage output during switching of the second set of switches, thereby removing loading of stage output by the second set of switches.

REFERENCES:
patent: 4095093 (1978-06-01), Miles
patent: 4096402 (1978-06-01), Schroeder et al.
patent: 4404474 (1983-09-01), Dingwall
patent: 4611337 (1986-09-01), Evans
patent: 4638187 (1987-01-01), Boler et al.
patent: 4789796 (1988-12-01), Foss
patent: 4958088 (1990-09-01), Farah-Bakhsh et al.
patent: 4984204 (1991-01-01), Sato et al.
patent: 5122690 (1992-06-01), Bianchi
patent: 5128560 (1992-07-01), Chern et al.
patent: 5128563 (1992-07-01), Hush et al.
patent: 5134311 (1992-07-01), Biber et al.
patent: 5150186 (1992-09-01), Pinney et al.
patent: 5165046 (1992-11-01), Hesson
patent: 5179298 (1993-01-01), Hirano et al.
patent: 5194765 (1993-03-01), Dunlop et al.
patent: 5220208 (1993-06-01), Schenck
patent: 5239206 (1993-08-01), Yanai
patent: 5254883 (1993-10-01), Horowitz et al.
patent: 5274276 (1993-12-01), Casper et al.
patent: 5276642 (1994-01-01), Lee
patent: 5278460 (1994-01-01), Casper
patent: 5281865 (1994-01-01), Yamashita et al.
patent: 5311481 (1994-05-01), Casper et al.
patent: 5321368 (1994-06-01), Hoelzle
patent: 5347177 (1994-09-01), Lipp
patent: 5347179 (1994-09-01), Casper et al.
patent: 5361002 (1994-11-01), Casper
patent: 5390308 (1995-02-01), Ware et al.
patent: 5400283 (1995-03-01), Raad
patent: 5438545 (1995-08-01), Sim
patent: 5440260 (1995-08-01), Hayashi et al.
patent: 5457407 (1995-10-01), Shu et al.
patent: 5473575 (1995-12-01), Farmwald et al.
patent: 5497127 (1996-03-01), Sauer
patent: 5498990 (1996-03-01), Leung et al.
patent: 5506814 (1996-04-01), Hush et al.
patent: 5508638 (1996-04-01), Cowles et al.
patent: 5513327 (1996-04-01), Farmwald et al.
patent: 5568077 (1996-10-01), Sato et al.
patent: 5574698 (1996-11-01), Raad
patent: 5576645 (1996-11-01), Farwell
patent: 5578941 (1996-11-01), Sher et al.
patent: 5581197 (1996-12-01), Motley et al.
patent: 5590073 (1996-12-01), Arakawa et al.
patent: 5619473 (1997-04-01), Hotta
patent: 5621690 (1997-04-01), Jungroth et al.
patent: 5627780 (1997-05-01), Malhi
patent: 5627791 (1997-05-01), Wright et al.
patent: 5631872 (1997-05-01), Naritake et al.
patent: 5636163 (1997-06-01), Furutani et al.
patent: 5636173 (1997-06-01), Schaefer
patent: 5636174 (1997-06-01), Rao
patent: 5638335 (1997-06-01), Akiyama et al.
patent: 5655105 (1997-08-01), McLaury
patent: 5668763 (1997-09-01), Fujioka et al.
patent: 5682342 (1997-10-01), Suzuki
patent: 5694065 (1997-12-01), Hamasaki et al.
patent: 5831929 (1998-11-01), Manning
Taguchi, M. et al., "A 40-ns 64-Mb DRAM with 64-b Parallel Data Bus Architecture", IEEE Journal of Solid-State Circuits, vol. 26, Nov. 1991, pp. 1493-1497.
Descriptive literature entitled, "400 MHz SLDRAM, 4M x 16 SLDRAM Pipelined, Eight Bank, 2.5 V Operation", pp. 1-22.
"Draft Standard for a High-Speed Memory Interface (SyncLink)", Microprocessor and Microcomputer Standards Subcommittee of the IEEE Computer Society, Copyright 1996 by the Institute of Electrical and Electronics Engineers, Inc., New York, NY, pp. 1-56.

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