Nonvolatile semiconductor memory device having reduced source li

Static information storage and retrieval – Floating gate – Particular connection

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Details

36518517, 36518501, 257315, 257383, G11C 1604

Patent

active

058386157

ABSTRACT:
According to this invention, a metal interconnection for the common source diffusion layer of memory cell transistors can be easily formed. An insulating interlayer which covers memory cell transistors is formed on a substrate. A contact hole connected to each drain diffusion layer and a slit-like opening for forming the metal interconnection for the common source diffusion layer are formed on the insulating interlayer. Each contact hole and the slit-like opening are embedded with a refractory metal. The refractory metal in each contact hole is connected to a bit line on the insulating interlayer. In order to connect the refractory metal film in the slit-like opening to only an upper source line, the refractory metal in the slit-like opening crosses under the bit line so as to have an intermediate level of the insulating interlayer in the direction of thickness except for a contact portion with the source line.

REFERENCES:
patent: 5338956 (1994-08-01), Nakamura
patent: 5389808 (1995-02-01), Arai
patent: 5392237 (1995-02-01), Iida
patent: 5656840 (1997-08-01), Yang

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