1996-12-19
1999-07-27
Eng, David Y.
G06F 9302
Patent
active
059305185
ABSTRACT:
An arithmetic unit performs a demodulating operation for a received signal, a synchronizing operation based on a demodulated signal, a voice decoding operation for the demodulated signal, a voice encoding operation for a voice, and a modulating operation for a coded voice by a pipeline processing method. The arithmetic unit has an arithmetic portion for alternately performing a desired one of the demodulating operation, the modulating operation and the synchronizing operation and a desired one of the voice decoding operation and the voice encoding operation. The arithmetic unit further has a first storage portion for storing a result of the desired one of the demodulating operation, the modulating operation and the synchronizing operation performed by the arithmetic portion; and a second storage portion for storing a result of the desired one of the voice decoding operation and the voice encoding operation performed by the arithmetic portion.
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Eng David Y.
Matsushita Electric - Industrial Co., Ltd.
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