Motion compensated interframe decoding apparatus

Details Motion compensated interframe decoding apparatus Motion compensated interframe decoding apparatus

1986-09-02

1987-08-04

Orsino, Jr., Joseph A.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358105, 358167, H04N 712

Patent

active

046849840

ABSTRACT:
A television signal which has a motion vector code signal and a prediction error code signal, is separated by a demultiplexer into a prediction error code signal and a motion vector code signal. These signals are decoded. A variable delay circuit receives an immediately preceding television signal from a frame memory and produces a prediction signal in response to the decoded motion vector signal. An adder receives the decoded prediction error signal and the prediction signal and produces a decoded television signal. A noise reducer reduces a small interframe variation component of the decoded television signal. This signal is converted by a D/A converter to an analog signal.

REFERENCES:
patent: 4058836 (1977-11-01), Drewery et al.
patent: 4296436 (1981-10-01), Achida
patent: 4307420 (1981-12-01), Ninomiya et al.
patent: 4361853 (1982-11-01), Remy et al.
patent: 4371895 (1983-02-01), Koga
patent: 4500911 (1985-02-01), Ninomiya et al.
Rossi-"Digital Techniques"-SMPTE Journal, Mar. 1978, vol. 87, No. 3, pp. 134-140.

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