Patent
1988-10-05
1990-12-04
James, Andrew J.
357 234, 357 238, 357 34, 357 38, 357 90, 357 20, H01L 2990
Patent
active
049757512
ABSTRACT:
Series resistance in the low impurity portion of a high breakdown PN junction of a three or four layer device is reduced by providing an increased impurity region at the junction of the same conductivity type as the low impurity portion and having an impurity profile such that the increased impurity region is depleted under reverse biasing before critical field is reached therein. The three layer device include insulated gate field effect transistors and bipolar devices and the four layer device is an SCR.
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Crane Sara W.
Harris Corporation
James Andrew J.
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