Secure implementation of transition machine computer

Details Secure implementation of transition machine computer Secure implementation of transition machine computer

1979-11-07

1982-05-04

Shaw, Gareth D.

Boots, shoes, and leggings

G06F 1300

Patent

active

043285422

ABSTRACT:
A secure implementation of a transition machine utilizing requirements oriented application programming and a hardware executive. The hardware executive is physically separate and protected from data processors executing the application programs and limits access authorization both for program execute and data read and write operations.

REFERENCES:
patent: 3562717 (1971-02-01), Harmon et al.
patent: 3931504 (1976-01-01), Jacoby
patent: 4087856 (1978-05-01), Attanasio
patent: 4104721 (1978-08-01), Markstein et al.
Bell, D. E. and La Padula, L. J.; "Secure Computer Systems:Mathematical Foundations and Model", M74-244, The MITRE Corp., Bedford, MA, (Oct. 1974).
Bell, D. E., "Secure Computer Systems:A Refinement of the Mathematical Model", ESD-TR-73-278, vol. 3, (Apr. 1974).
Schiller, W. L., "The Design and Specification of a Security Kernel for the PDP-11/45", ESD-TR-75-69, The MITRE Corp., Bedford, MA, (May 1975).
Bell et al., "Secure Computer Systems:A Mathematical Model-Vol. II", AD-771 543, The MITRE Corp., Bedford, MA, (Nov. 1973).
Millen, J. K., "Security Kernel Validation in Practice", Comm. ACM, vol. 19, No. 5, (May 1976).
Schiller, W. L., "Design and Abstract Specification of a Multics Security Kernel", ESD-TR-77-259, vol. I, The MITRE Corp., Bedford, MA, (Nov. 1977).
Saltzer et al., "The Protection of Information in Computer Systems", Proc. of the IEEE, vol. 63, No. 9, (Sep. 1975), pp. 1278-1308.
Keller, R. M., .revreaction.Formal Verification of Parallel Programs", Comm. ACM, vol. 19, No. 7, (Jul. 1976), pp. 371-384.
Keller, R. M., "Parallel Program Schemata and Maximal Parallelism", J. ACM, vol. 20, No. 3, (Jul. 1973), pp. 514-537.
Keller, R. M., "Parallel Program Schemata and Maximal Parallelism", J. ACM, vol. 20, No. 4 (Oct. 1973), pp. 696-710.
Chroust, G., "Multiprocessing Scheduler", IBM Tech. Disc. Report, vol. 15, No. 5, (Oct. 1972), pp. 1643-1644.
Tangney, J. D., "Minicomputer Architectures for Effective Security Kernel Implementations", ESD-TR-78-170, The MITRE Corp., Bedford, MA, (OCT. 1978).
Burke, E. L., "Computer Security Technology", F-19628-78-C-0001, The MITRE Corp., Bedford, MA, pp. 1-5.
Lipner, S. B., "A Minicomputer Security Control System", The MITRE Corp., Bedford, MA, pp. 57-60.

Affiliated with

Also associated with

Rating

Secure implementation of transition machine computer does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Secure implementation of transition machine computer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Secure implementation of transition machine computer will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-884705