Request control apparatus

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Details

364DIG1, 3642549, 3642543, 3642551, 3642563, G06F 1204, G06F 1208

Patent

active

053136012

ABSTRACT:
A controller for controlling requests to memory, said requests involving executing in a computer system an instruction having a variable length operand, for use in a computer system for managing the main store in a page size of 2.sup.m byte units by on demand paring processing and for executing an instruction or an operation in not larger than 2.sup.m (n is larger than m) byte operand units includes a detector for detecting the presence of operand data on a same or single page by referencing the (n-m) most significant bits of the n least significant bits of an effective address which has been generated. If the detector has detected the presence of the operand data on the same page, the memory request is altered by dispensing with an unnecessary check request.

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