Method and apparatus for simulating a microelectronic circuit

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364488, 364578, G06F 1520

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053133986

ABSTRACT:
A method and apparatus for simulating a microelectronic circuit includes the steps of storing of a microelectronic circuit or system representation in a computer system and then dividing the circuit or system into portions containing nonlinear elements and linear partitions. The linear partitions are then independently solved for by modelling each linear partition using Asymptotic Waveform Evaluation (AWE) to form multiport admittance macromodels. These macromodels provide admittance and current stencils, which may be functions of time, to a global MNA matrix used by SPICE at each time point to simulate the operation of the entire microelectronic circuit. A linearized transient representation for the nonlinear elements is provided as SPICE admittance and current stencils using conventional techniques. By using AWE techniques to solve the linear partitions separately, significant savings in computation time and improved computational storage efficiency can be achieved.

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Raghavan et al., "Awespice: A General Tool for the Accurate and Efficient Simulation of Interconnect Problems"-Proc. 29th ACM/IEEE Design Automation Conference-Abstract-Jun. 8-12, 1992; Anaheim, Calif.
Pillage and Rohrer, "Asymptotic Waveform Evaluation for Timing Analysis", IEEE Transactions on Computer-Aided Design, vol. 9, No. 4, pp. 352-366, Apr. 1990.
Huang, Raghavan and Rohrer, "AWEism: A Program for the Efficient Analysis of Linear(ized) Circuits", Technical Digest of IEEE Internat'l. Conference on Computer-Aided Design, pp. 534-537, Nov., 1990.
Xieand Nakhla, "Delay and Crosstalk Simulation of High-Speed VSLI Interconnects with Nonlinear Terminations", Technical Digest of the IEEE Internat'l. Conference on Computer-Aided Design, pp. 66-69, 1991.
Anastasakis, Gopal, Kim and Pillage, "On the Stability of Moment-Matching Approximations in Asymptotic Waveform Evaluation," Proceedings of 29th ACM/IEEE Automation Conf., Jun., 1992.

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