Input/output buffer circuitry

Details Input/output buffer circuitry Input/output buffer circuitry

1981-09-21

1984-08-28

Gruber, Felix D.

Boots, shoes, and leggings

G06F 300

Patent

active

044687532

ABSTRACT:
An input/output bus structure for a computer system is disclosed in which the computer's central processor is fully protected from "foreign" I/O devices in that all of the incoming and outgoing bus signals are buffered and the buffer stores can be disabled under software control. To attach an input/output device on the input/output bus, certain requirements, both hardware and software, must be met. The input/output bus is enabled by writing a predetermined bit pattern to a preselected output port. In response to the bit pattern, hardware in the input/output port enables the input/output bus tranceivers to receive and send information.

REFERENCES:
patent: 4200930 (1980-04-01), Rawlings et al.
patent: 4218740 (1980-08-01), Bennett et al.
patent: 4253148 (1981-02-01), Johnson et al.

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