Image analysis – Image transformation or preprocessing – Correlation
Patent
1997-11-07
1999-09-21
Couso, Jose L.
Image analysis
Image transformation or preprocessing
Correlation
382103, 382107, 382291, 382304, 382307, 382312, 382318, 364133, 364134, 364159, 36416705, 36446828, 364489, 364490, 364712, 348 80, 348 87, 348154, G06K 15316, G06K 964
Patent
active
059564342
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor operational circuit, and in particular, relates to an operational circuit which is applied to high speed image processing or the like.
2. Description of the Related Art
In recent years, in concert with the development in computer technology, the progress in the field of data processing technology has been truly remarkable. However, when attempts as were made to realize the flexible type of data processing conducted by human beings, it was almost impossible to obtain the results of such calculations in real time using present computers. The reasons advanced for this are that the data which human beings process in the course of their daily lives are analog data, and these data are vague. It is thus a problem in present data processing systems that the extremely redundant analog data are all converted into digital values, and rigorous digital operations are conducted one by one.
An example of this is image processing. For example, if one screen is incorporated into a 500.times.500 two dimensional array, then the total number of pixels is 250, 000, and when the strength of the three colors red, green, and blue for each pixel is expressed in terms of 8 bits, then the amount of data in one stationary image reaches 750,000 bits. In moving images, the amount of image data increases with time.
Present day computers conduct data processing with respect to enormous amounts of digital signals by repetitive operations, so that an enormous amount of time is required, and real time processing is impossible.
An example of this is the detection of movement vectors, which is one the important operations in the processing of moving images. That is to say, in this operation, with respect to the images in two frames which are continuous in time, the amount of motion in the image of the object photographed is determined. In this operation, the image may be moved by I 8 pixels vertically or horizontally, and the amount of dislocation may be determined by overlaying the images until they line up. In other words, the amount of dislocation in the image between the two frames is calculated with respect to a total of 64 combinations, and the combination having the smallest amount of dislocation is found. Total calculations of a few tens of GOPS are required, and even if extremely high speed processors are employed on a number of chips in parallel, a period of approximately 30 msec is required. In order to control robots in real time, it is important to conduct the image data processing in 1 msec or less; however, this is completely impossible with current technology.
The present invention was designed in light of the above circumstances; it has as an object thereof to provide a semiconductor operational circuit which is capable of instantaneously processing in parallel a large quantity of information.
SUMMARY OF THE INVENTION
The semiconductor operational circuit of the present invention which executes a predetermined operation with respect to a first signal train of signals A.sub.1, A.sub.2, . . . , A.sub.N-1, A.sub.N (where N is a positive integer) of N signals numbered from 1 to N, and a second signal train of signals B.sub.1, B.sub.2, . . . , B.sub.M-1, B.sub.M (where M is a positive integer) of M signals numbered from 1 to M, comprising a plurality of first operational circuits for executing a predetermined operation with respect to A.sub.i and B.sub.i+n, (where i is a positive integer and n is a positive or negative integer and 1.ltoreq.i.ltoreq.n and 1.ltoreq.i+n.ltoreq.M) and generating an output signal C.sub.i,n, at least one second operational circuit for generating the sum S.sub.n of a part or the whole of output signals of the first operational circuits with respect to a predetermined value of n, where i has differing values, or for generating a predetermined signal T.sub.n determined by the sum S.sub.n, and a third operational circuit for finding the value of S.sub.n or T.sub.n with respect to a plurality of differe
REFERENCES:
patent: 5497343 (1996-03-01), Rarick
patent: 5586202 (1996-12-01), Ohki et al.
Ohmi Tadahiro
Shibata Tadashi
Couso Jose L.
Knuth Randall J.
Patel Kanji
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