1988-03-10
1989-11-07
Smith, Jerry
Excavating
G06F 1110
Patent
active
048797200
ABSTRACT:
A decoding system capable of outputting Viterbi-decoding-algorithm-decoded data at a predetermined rate that is greater than a given rate at which coded data is processed in accordance with said algorithm to produce the decoded data. The system includes a data input bus; a data output bus; a ring of decoders, with each decoder being coupled to the input bus for receiving coded data from the input bus and coupled to the output bus for providing decoded data onto the output bus. Each of the decoders in the ring includes an input buffer, timing controller, decoding processor and output buffer. The input buffer responds to a start-input signal from a preceding decoder in the ring by buffering a block of the received coded data. The timing contoller provides a start-input signal to a succeeding decoder in the ring at such time as to cause the succeeding decoder to receive a block of coded data from the input bus that overlaps the block of coded data received from the input bus by the instant said decoder. The decoding processor processes the buffered block of coded data at a given rate to produce decoded data. The output buffer buffers the block of decoded data. The timing controller also responds to a start-up signal provided by a preceding decoder in the ring by causing the buffered decoded data to be provided onto the data output bus at a predetermined rate that is greater than the given rate at which the coded data is processed to produce the decoded data; and further provides a start-output signal to the succeeding decoder in the ring to cause the succeeding decoder to provide a portion of the buffered decoded data therein onto the data output bus at a predetermined rate and at such time as to be continuous from and not overlap the portion of the buffered decoded provided onto the output data bus from the instant said decoder.
REFERENCES:
patent: 3657700 (1972-04-01), Lutzker
patent: 3665396 (1972-05-01), Forney
patent: 4677625 (1987-06-01), Betts
Viterbi, "Error Bounds for Convolutional Codes and an Asympotically Optimum Recording Algorithm", IEEE Transactions on Information Theory, vol. IT-13, No. 2, Apr. 1967, pp. 260-269.
Odenwalder, "Error Control", Data Communications, Networks and Systems, Bartee, Ed. Sams 1985, Ch. 10, pp. 289-354.
Yasuda et al., "Development of Variable-Rate Viterbi Decoder and Its Performance Characteristics", Sixth International Conference on Digital Satellite Communications, Sep. 19-23, 1983, pp. XII-24 to XII-31.
Antonio Franklin P.
Bilotta Thomas R.
Gardner Steven H.
Kelkar Krishnanand
Kindred Daniel R.
Beausoliel Robert W.
Callan Edward W.
M/A-COM Government Systems Inc.
Smith Jerry
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