Data processing system having a unique micro-sequencing system

Details Data processing system having a unique micro-sequencing system Data processing system having a unique micro-sequencing system

1983-03-09

1985-11-19

Zache, Raulfe B.

Boots, shoes, and leggings

G06F 1300

Patent

active

045546274

ABSTRACT:
A data processing system which handles thirty-two bit logical addresses which can be derived from either sixteen bit logical addresses or thirty-two bit logical addresses, the latter being translated into physical addresses by unique translation means. The system includes means for decoding macro-instructions of both a basic and an extended instruction set, each macro-instruction containing in itself selected bit patterns which uniquely identify which type of instruction is to be decoded. The decoded macro-instructions provide the starting address of one or more micro-instructions, which address is supplied to a unique micro-instruction sequencing unit which appropriately decodes a selected field of each micro-instruction to obtain each successive micro-instruction. The system uses hierarchical memory storage using eight storage segments (rings), access to the rings being controlled in a privileged manner according to different levels of privilege. The memory system uses a bank of main memory modules which interface with the central processor system via a dual port cache memory, block data transfers between the main memory and the cache memory being controlled by a bank controller unit.

REFERENCES:
patent: 4003033 (1977-01-01), O'Keefe
patent: 4038533 (1977-07-01), Dummermuth
patent: 4155119 (1979-05-01), DeWard
patent: 4161778 (1979-07-01), Getson

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