Patent
1997-03-03
1999-12-14
Donaghue, Larry D.
395391, 395382, 395376, G06F 938
Patent
active
060028807
ABSTRACT:
A VLIW processor has less instruction issue slots than functional units. Operands and results for the operations specified by the instruction issue register are stored in a multiport register file. The multiport register file has numbers of read and write ports which are tied to the number of instruction issue slots rather than to the number of functional units. A write control unit controls transfer of results from functional units to the multiport register file to take into account instruction latency.
REFERENCES:
patent: 4942525 (1990-07-01), Shintani et al.
patent: 5055997 (1991-10-01), Sluijter et al.
"Ohmega: A VLSI Superscalar Processor Architecture for Numerical Applications", by Nakajima et al, 18th Inter. Symposium on Computer Architecture, May 27, 1991, pp. 160-168.
De Gloria et al., "A Programmable Instruction Format Extension to VLIW Architectures", IEEE Computer Society, CompEuro 1992 Proceedings, May 4-8, 1992, pp. 35-40.
Matterne et al. A Flexible High Performance 2-D Discrete Cosine Transform IC.
Fisher; Replacing Hardware That Thinks (especially about parallelism/with a smart rompilier) Apr. 1988.
Case; "Phillips gives LIFE to VLIW" Microprossor Report; Aug. 1990.
Barschall Anne E.
Donaghue Larry D.
Philips Electronics North America Corporation
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