Semiconductor memory device with control for auxiliary word line

Details Semiconductor memory device with control for auxiliary word line Semiconductor memory device with control for auxiliary word line

1998-09-01

1999-12-14

Le, Vu A.

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

36523003, 36518909, G11C 700

Patent

active

060026359

ABSTRACT:
A semiconductor memory device has a main row decoder for controlling a main word line, an auxiliary row decoder for controlling auxiliary word lines, and auxiliary word line drive circuits controllable by the main word line and the auxiliary word selecting lines, for controlling auxiliary word lines to select memory cells. The semiconductor memory device incorporates a hierarchical word line system where word lines do not need to be lined with metallized interconnections. The main word line and the auxiliary word selecting lines control the auxiliary word line drive circuits to supply an arbitrary negative voltage generated by a negative potential generator to an auxiliary word line in an unselected state, and to keep only a selected auxiliary word line at a high level in a selected state.

REFERENCES:
patent: 5808955 (1998-09-01), Hwang et al.
"Circuit Design Techniques for Low-Voltage Operating and/or Giga-Scale DRAMs" Yamagata et al ISSCC95; Feb. 17, 1995; p. 248-249.

Affiliated with

Also associated with

Rating

Semiconductor memory device with control for auxiliary word line does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device with control for auxiliary word line, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device with control for auxiliary word line will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-869768