Semiconductor memory device

Static information storage and retrieval – Interconnection arrangements

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Details

36518511, 36518513, 36523003, G11C 506

Patent

active

060026065

ABSTRACT:
The semiconductor memory device of this invention includes a plurality of blocks and an external bit line extending through the plurality of blocks in a column direction, wherein each of the plurality of blocks includes a plurality of bank regions each including a plurality of memory cells arranged in a matrix, the plurality of bank regions are arranged in the column direction, each of the plurality of blocks has a main bit line, the main bit line of each of the plurality of blocks extends through the plurality of bank regions in the column direction in parallel with the external bit line, to be shared by the plurality of bank regions, and the semiconductor memory device further includes a block selector for receiving a signal from outside for selecting one of the plurality of blocks and activating the main bit line corresponding to the selected block with the external bit line.

REFERENCES:
patent: 5748528 (1998-05-01), Campardo et al.
patent: 5748535 (1998-05-01), Lin et al.
patent: 5764575 (1998-06-01), Kawai et al.
patent: 5898616 (1999-04-01), Ono

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