Programmable controller

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Details

364900, G06F 1546, G05B 1900

Patent

active

046023259

ABSTRACT:
Each of a plurality of input/output units (2, 3) connected to an arithmetic control unit (1) is provided with a selection latch circuit (23, 33). The selection latch circuits are connected in series in such a manner that the output (25) of the selection circuit of a certain input/output unit (2) is connected to the input of the selection circuit (33) of the succeeding-stage unit (3). When a selection signal is sent to the input/output unit arranged near to the arithmetic control unit (1), the input/output unit is addressed by the output of the selection latch circuit, and simultaneously, the signal is transmitted to the selection latch circuits provided in the succeeding-stage input/output circuits.

REFERENCES:
patent: 4064395 (1977-12-01), Schubeler et al.
patent: 4078259 (1978-03-01), Soulsby et al.
patent: 4079452 (1978-03-01), Larson et al.
patent: 4104731 (1978-08-01), Grudowski et al.
patent: 4249248 (1981-02-01), Yomogida et al.

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