Method of making high-performance dram arrays including trench c

Details Method of making high-performance dram arrays including trench c Method of making high-performance dram arrays including trench c

1987-11-17

1988-12-27

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 47, 437 52, 437 60, 437 79, 437160, 437203, H01L 21302

Patent

active

047940913

ABSTRACT:
Parallel elongated trenches in a silicon substrate are utilized to form multiple distinct memory cell capacitors on each continuous wall of each trench. Chanstops are formed between adjacent capacitors to achieve electrical isolation. A separate word line overlies each trench wall and is connected via respective MOS transistors to the spaced-apart capacitors formed on the wall. A reliable high-density memory characterized by excellent performance is thereby realized.

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