Programmable binary counter

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Details

328 42, 328 49, H03K 2134, H03K 2136

Patent

active

042648645

ABSTRACT:
A plurality of flip-flops in cascade are divided into first and second groups. A first gate detects all of the first group assuming a logic 1 to set an RS flip-flop which in turn presets the first group. A second gate changes its logic output when the second groups takes a predetermined logic state after the detection by the first gate. A D type flip-flop, upon simultaneously receiving both an input pulse and the changed output of the second gate, produces an output which presets the second group and resets the RS flip-flop.

REFERENCES:
patent: 3096483 (1963-07-01), Ransom
patent: 3395352 (1968-07-01), McCammon
patent: 3745315 (1973-07-01), Brendzel

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