Semiconductor memory device having a plurality of banks

Details Semiconductor memory device having a plurality of banks Semiconductor memory device having a plurality of banks

1996-12-16

1998-10-06

Nelms, David C.

Static information storage and retrieval

Addressing

Plural blocks or banks

36523006, 36518905, G11C 800

Patent

active

058187855

ABSTRACT:
A semiconductor memory device having a plurality of banks of memory cells is provided. The device has a data line provided in each of the banks for coupling to one of the memory cells in the corresponding bank. A common data line is shared by the banks, and is selectively coupled to one of the data lines through switches. Additionally, an amplifier is coupled to the common data line to amplify data read from a selected memory cell, and an I/O line is coupled to the amplifier to transmit the amplified data to an outer section. In the device, one of the banks of memory cells is selected by a bank select signal. Therefore, the amplifier is shared by the banks. Further the length of the I/O line can be shortened so that the load on the amplifier can be reduced. Accordingly, chip area is decreased and the speed of the memory device is improved.

REFERENCES:
patent: 5229971 (1993-07-01), Kiryu et al.
patent: 5404338 (1995-04-01), Murai et al.
patent: 5521880 (1996-05-01), McClure

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