Method and structure for an advanced isolation spacer shell

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material

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438427, 438435, 438445, H01L 2176

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059337478

ABSTRACT:
A method and structure are provided for a spacer shell structure which is formed of dielectric materials seletive to one another. The dielectric materials can be configured into a chosen geometric arrangement. The isolation properties of the spacer shell can be scaled to meet a given set of isolation requirements as determined by the size and density of the IGFET devices being isolated. The method to fabricate the novel spacer shell maintains costly fabrication steps at a minimum. The isolation ability of the novel spacer shell preserves the operation integrity of neighboring IGFET devices. Electrical shorts between adjacent devices are prevented. Capacitive coupling between neighboring IGFET structures is likewise minimized.

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patent: 5466637 (1995-11-01), Kim
patent: 5763315 (1998-06-01), Benedict et al.

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