Method of providing electrical connection between an integrated

Details Method of providing electrical connection between an integrated Method of providing electrical connection between an integrated

1997-08-13

1999-08-03

Chaudhuri, Olik

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Metallic housing or support

438108, 438124, 438613, 257666, 257693, 257737, 257738, 22818022, H01L 2144, H01L 23495, H01L 2348, B23K 3102

Patent

active

059337109

ABSTRACT:
A surface mounted integrated circuit die package includes a group of peripheral leads extending laterally outwardly from the perimeter of the package and also includes an array of solder balls on the bottom of the package. The arrangement provides for a greater number of input/output connections to a die package by utilizing both peripheral leads and a ball grid array without requiring increases in package size or a reduction in the width of electrically conductive interconnections.

REFERENCES:
patent: 4530002 (1985-07-01), Kanai
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patent: 4942454 (1990-07-01), Mori et al.
patent: 5040035 (1991-08-01), Gabara et al.
patent: 5157480 (1992-10-01), McShane et al.
patent: 5239198 (1993-08-01), Lin et al.
patent: 5355016 (1994-10-01), Swirbel et al.
patent: 5355283 (1994-10-01), Marrs et al.
patent: 5563446 (1996-10-01), Chia et al.

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