Method of making thyristor with a high tolerable bias voltage

Details Method of making thyristor with a high tolerable bias voltage Method of making thyristor with a high tolerable bias voltage

1985-09-19

1987-01-27

Roy, Upendra

Metal treatment

Compositions

Heat treating

29576B, 148187, 148DIG165, 357 38, 357 91, H01L 21265

Patent

active

046392769

ABSTRACT:
A thyristor having a high tolerable voltage V.sub.Bo comprising a first emitter layer (3), a first base layer (1), a second base layer (2), a second emitter layer (4) covering the surface except for a gate region (5) of the second emitter layer, said layers being of alternating semiconductivity types, a first emitter electrode (6), a second emitter electrode (7) and a gate electrode (8) overlaying the gate region, wherein the gate region is formed over an area of the first base region having a higher impurity concentration than any other area of the first base layer. The area of highest impurity concentration may be formed by a process of pulling an ingot of silicon from the melt with a magnetic field applied perpendicular to the convection of silicon with the temperature at the desired area being higher than elsewhere or by a process of neutron irradiating a wafer of float-zone silicon with the highest neutron dose at the desired area.

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patent: 4119441 (1978-10-01), Haas et al.
patent: 4278475 (1981-07-01), Bartko et al.
patent: 4311534 (1982-01-01), Bartko et al.
Platzoder et al, IEEE Trans. Electron Devices, ED-23, (1976), 805.
Schnoller, IEEE Trans. Electron Devices, ED-21, (1974), 313.
Haas et al, Jour. Electronic Materials, 5, (1976), 57.

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