Boots – shoes – and leggings
Patent
1994-03-23
1995-02-28
Dixon, Joseph L.
Boots, shoes, and leggings
364DIG1, 364245, 3642467, 364970, G06F 1200, G06F 1300
Patent
active
053945387
ABSTRACT:
A memory selection circuit of a computer provided with a central processing unit and a plurality of memory areas of an equal capacity, including the first circuit for storing data corresponding to the capacity of the plurality of memory areas outputted from the central processing unit, the second circuit for storing an address outputted from the central processing unit, the third circuit for generating a signal that indicates a difference between the address stored in the second circuit and a predetermined address assigned to a beginning of the plurality of memory areas; and the fourth circuit for generating a selection signal for selecting one of the plurality of memory areas on the basis of the data stored in the first circuit and the signal generated by the third circuit.
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Imai Shigeki
Wada Masahiko
Asta Frank J.
Dixon Joseph L.
Sharp Kabushiki Kaisha
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