MOS integrated circuit with adjustable threshold voltage

Details MOS integrated circuit with adjustable threshold voltage MOS integrated circuit with adjustable threshold voltage

1992-09-14

1995-02-28

LaRoche, Eugene R.

Static information storage and retrieval

Floating gate

Particular biasing

36518909, 365218, G11C 700

Patent

active

053943597

ABSTRACT:
The MOS cell with adjustable threshold voltage is a cell of the type with a memory that is electrically-erasable and programmable by storage of charges by tunnel effect in a floating gate. To obtain a circuit with adjustable threshold voltage, the cell is first of all "programmed" at zero so that all the charges that may be stored are removed and then it is "erased", with its source grounded, its drain taken to the high potential and its control gate taken to the potential desired for the threshold voltage V.sub.T of the circuit. At the end of this phase, the threshold voltage is adjusted. This device can be applied notably to circuits requiring precise voltage references in MOS technology, namely circuits of the detector or analog-digital converter type.

REFERENCES:
patent: 4063224 (1977-12-01), Kirschner
patent: 4336603 (1982-06-01), Kotecha et al.
patent: 4357571 (1982-11-01), Roessler
patent: 4442447 (1984-04-01), Ipri et al.
patent: 4542485 (1985-09-01), Iwahashi et al.
patent: 4577215 (1986-03-01), Stewart et al.
patent: 4888630 (1989-12-01), Paterson
patent: 4999813 (1991-03-01), Ohtsuka et al.

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