Programmable logic device

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307243, H07K 19177

Patent

active

049637703

ABSTRACT:
In a programmable logic device having a plurality of programmable logic elements (PLEs) where each PLE includes a combinational logic circuit and a plurality of flip-flop circuits, input selector switches for selecting one of a plurality of input signals to be input into a flip-flop circuit are provided by which an output from a combinational logic circuit of its own PLE and an output from another PLE are made selectable. The output from the combinational logic circuit is also output independently of an output from a flip-flop circuit, so that either one of the outputs can be utilized by use of external programmble wiring. Further by selecting respective input terminals of each flip-flop circuit, an output signal from an adjoining flip-flop circuit is inputtable into another flip-flop circuit, so that the flip-flop circuits can be serially connected to each other. Additionally, the last flip-flop circuit of one PLE can supply an output signal to a first flip-flop circuit of an adjoining PLE by the selection of an input terminal which connects the adjoining PLEs through connecting wiring for specialized use, so that adjoining PLEs can be connected to each other without passing through the programmable wirings.

REFERENCES:
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patent: 4758746 (1988-07-01), Birkner et al.
patent: 4763020 (1988-08-01), Takata et al.
patent: 4786904 (1988-11-01), Graham, III et al.
Elektonik, vol. 36, no. 19, 18th Sep. 1987, pp. 30-32, Munchen, DE; H. Biehel: "ASICs: Anwenderprogrammierbare CMOS-Gate-Arrays".
Proceedings of the IEEE 1987 Custom Integrated Circuits Conference, Portland, OR, 4-7 May 1987, pp. 515-521, IEEE, NY, US; H. -C. HSIEH et al.: "A Second Generation User-Programmable Gate Array".
Hsieh et al., "A 9000-Gate-User-Programmable Gate Array," IEEE 1988 Custom Integrated Circuits Conference, pp. 15.3.1-15.3.7. (May 16-19, 1988).
El Gamal et al., "An Architecture for Electrically Configurable Gate Arrays," IEEE 1988 Custom Integrated Circuits Conference pp. 15.4.1-15.4.4. (May 16-19, 1988).

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