Two-level ECL multiplexer without emitter dotting

Details Two-level ECL multiplexer without emitter dotting Two-level ECL multiplexer without emitter dotting

1988-08-25

1990-10-16

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307467, 307443, 307243, H03K 19086, H03K 1716

Patent

active

049637673

ABSTRACT:
A two-level 4:1 ECL multiplexer circuit comprising two 2:1 multiplexer circuits "OR'd" together prior to a shared output stage. A differential Select line, operable at the same voltage level as the input data lines to the 2:1 multiplexer circuits selects one of the input lines to each 2:1 multiplexer circuit. A second Select line, operable at a different voltage level, selects one or the other of the 2:1 multiplexer circuits. This arrangement functions to eliminate an undesirable glitch observed when selecting data inputs in known two-level, 4:1 multiplexers which use emitter dotting.

REFERENCES:
patent: 3550040 (1970-12-01), Sinusas
patent: 3681614 (1972-08-01), Kroos
patent: 3783307 (1974-01-01), Breuer
patent: 4196358 (1980-04-01), Conover et al.
patent: 4256980 (1981-03-01), Asada et al.
patent: 4349750 (1982-09-01), Geurts
patent: 4354266 (1982-10-01), Cooperman et al.
patent: 4695749 (1987-09-01), Lam

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