Boots – shoes – and leggings
Patent
1989-05-24
1992-07-21
Lee, Thomas C.
Boots, shoes, and leggings
364DIG1, 3642286, 3642306, 3642329, 36426791, 395800, G06F 930, G06F 1516
Patent
active
051330571
ABSTRACT:
A multiprocessor system which includes a non-conventional co-processor to make it easier to observe the internal state of the co-processor. The system consists of a main processor, a co-processor, and a main memory unit connected by an external bus. The main processor sends instructions to the co-processor via an execution request line which connects the main and co-processors. The instruction sent via the request line, is either a debug mode-setting, register dumping, or an arithmetic execution instruction. The co-processor responds by setting a debug mode flag for a debug mode instruction, storing registers in the main memory unit for a register dumping instruction, or performing an arithmetic operation in response to an arithmetic instruction.
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Ishii Satoshi
Yamada Ikufumi
Lee Thomas C.
Lim Krisna
NEC Corporation
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