Narrow gate opening manufacturing of gated fluid emitters

Details Narrow gate opening manufacturing of gated fluid emitters Narrow gate opening manufacturing of gated fluid emitters

1994-01-04

1995-02-28

Jackson, Jerome

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Including dielectric isolation means

313310, 313336, 445 50, 445 51, B44C 122, C23F 102, H01L 3100

Patent

active

053940067

ABSTRACT:
A method of forming a self-aligned gated field emitter with reduced gate opening and uniform gate height, on a substrate, is described. A field emitter is formed on the substrate. A thin, conformal dielectric layer is formed over the field emitter and the substrate. A thick dielectric layer is formed over the thin, conformal dielectric layer. The thick dielectric layer is planarized. The thick dielectric layer is etched back. A conductive layer is formed over the thick dielectric layer. The conductive layer is planarized and then etched back. The field emitter is exposed by forming an opening in the conductive layer, by removing the portion of the thin, conformal dielectric layer above and around the top of the field emitter.

REFERENCES:
patent: 4766340 (1988-08-01), van der Mast et al.
patent: 4857161 (1989-08-01), Borel et al.
patent: 4964946 (1990-10-01), Gray et al.
patent: 5151061 (1992-09-01), Sandhu
patent: 5186670 (1993-02-01), Doan et al.
patent: 5188977 (1993-02-01), Stengl et al.
patent: 5229331 (1993-07-01), Doan et al.
"Fabrication of Self-Aligned Gated Field Emitters", Journal of Micromechenical Microengineering 2 (1992), pp. 21-24.

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