Method for forming a planar intermetal dielectric layer

Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means

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438758, 438761, 438780, 438785, 438787, H01L 21283, H01L 21316

Patent

active

059324872

ABSTRACT:
A method of forming a planar intermetal dielectric over conductive metal structures is disclosed. The method comprises the steps of: (1) forming a liner oxide layer over the conductive metal structures; (2) forming a spin on glass layer over the liner oxide layer; (3) forming a cap oxide layer over the spin on glass layer; (4) forming a TiN layer over the cap oxide layer; (5) patterning and etching a contact hole through the TiN layer using the cap oxide layer as an etching stop; and (6) etching the cap oxide, the spin on glass, and the liner oxide down to the conductive metal structures using the TiN layer as a mask.

REFERENCES:
patent: 4585490 (1986-04-01), Raffel et al.
patent: 4879257 (1989-11-01), Patrick

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