Boots – shoes – and leggings
Patent
1986-10-23
1988-06-07
Harkcom, Gary V.
Boots, shoes, and leggings
G06F 938, G06F 942
Patent
active
047501120
ABSTRACT:
A data processing system for processing a sequence of program instructions has two independent pipelines, an instruction pipeline and an execution pipeline. Each pipeline has a plurality of serially operating stages. The instruction stages read instructions from storage and form therefrom address data to be employed by the execution pipeline. The execution pipeline receives the address data and uses it for referencing stored data to be employed for execution of the program instructions. Both pipelines operate synchronously under the control of a pipeline control unit which initiates operation of at least one stage of the execution pipeline prior to completion of the instruction pipeline for a particular instruction. Thereby operation of at least one instruction stage and one execution stage of the respective pipelines overlap for each program instruction. The instruction and execution pipelines share high speed memory. The pipeline control unit can independently control the flow of instructions through the two pipelines. This is important for operation in conjunction with a microcode storage element which allows conditional branching and subroutine operation. Circuitry also detects pipeline collisions and exception conditions and delays or inhibits operation of one or more of the pipeline stages in response thereto. Under control of the pipeline control unit, one of the independent pipelines can operate while the other is halted.
REFERENCES:
patent: 3840861 (1974-10-01), Amdahl et al.
patent: 3940741 (1976-02-01), Horikoshi et al.
patent: 4025771 (1977-05-01), Lynch, Jr. et al.
patent: 4075688 (1978-02-01), Lynch, Jr. et al.
patent: 4110822 (1978-08-01), Ponter et al.
patent: 4187539 (1980-02-01), Eaton
patent: 4197578 (1980-04-01), Wada et al.
patent: 4200927 (1980-04-01), Hughes et al.
patent: 4245304 (1981-01-01), Porter et al.
patent: 4251859 (1981-02-01), Momose et al.
patent: 4287561 (1981-09-01), Liptay
patent: 4305124 (1981-12-01), Marro et al.
patent: 4316244 (1982-02-01), Grondalski
patent: 4354225 (1982-10-01), Frieder et al.
patent: 4365311 (1982-12-01), Fukunaga et al.
patent: 4370711 (1983-12-01), Smith
patent: 4373180 (1983-02-01), Linde
patent: 4402042 (1983-08-01), Guttag
patent: 4439827 (1984-03-01), Wilkes
patent: 4454578 (1984-06-01), Matsumoto et al.
patent: 4467414 (1984-08-01), Akagi et al.
patent: 4471432 (1984-09-01), Wilhite et al.
IBM; Computer Structures: Principles and Examples; McGraw-Hill; 1982; Chapter 18--pp. 276-292; (1967).
"A Study of Branch Prediction Strategies", James E. Smith, The 8th Annual Symposium on Computer Architecture, May 12-14, 1981, pp. 135-148.
"Technique for Minimizing Branch Delay Due to Incorrect Branch History Table Predictions", G. S. Rao, IBM Technical Disclosure Bulletin, vol. 25, No. 1, Jun. 1982, pp. 97-98.
"Generalized History Table for Branch Prediction", J. J. Losq, IBM Technical Disclosure Bulletin, vol. 25, No. 1, Jun. 1982, pp. 99-101.
"Target Prefetch Table", L. Parks et al, IBM Technical Disclosure Bulletin, vol. 25, No. 4, Sep. 1982, pp. 2128-2129.
The Architecture of Pipelined Computers, Peter M. Kogge, Hemisphere Publishing Corporation, pp. 230-247.
Ardini, Jr. Joseph L.
Jones Walter A.
Jones, Jr. Paul R.
Harkcom Gary V.
Lynt C. H.
Prime Computer Inc.
LandOfFree
Data processing apparatus and method employing instruction pipel does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Data processing apparatus and method employing instruction pipel, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Data processing apparatus and method employing instruction pipel will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-848470