Semiconductor device with high withstand voltage

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357 13, 357 53, 357 38, 357 39, 357 20, 357 12, H01L 2906

Patent

active

051327694

ABSTRACT:
A semiconductor device has PN junction in architecture of PN.sup.- N.sup.+, P.sup.+ NN.sup.+, PIN, or P.gamma.N. Such semiconductor device comprises a first surface layer dopped with a first type impurity at a predetermined first concentration for forming a high resistant layer, a second layer formed below the first layer and dopped with a second type impurity which is different from the first impurity at a predetermined limited second concentration, the second layer forming PN junction between the first layer, and a third layer formed below the second layer and dopped with the second impurity at a predetermined third concentration higher than the second concentration. The semiconductor device also has a first edge section extending over the first layer and the second layer and formed into a first Bevel structure having a first taper angle, and a second edge section extending over the second and third layer so as to adjoin with the first edge section at an intersection oriented at a portion in the second layer and formed into a second Bevel structure having a second taper angle.

REFERENCES:
patent: 4236169 (1980-11-01), Nakashima et al.
patent: 4642669 (1987-02-01), Roggwiller et al.

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