Thin film transistor having an improved gate structure and gate

Details Thin film transistor having an improved gate structure and gate Thin film transistor having an improved gate structure and gate

1991-09-06

1992-07-21

James, Andrew J.

357 237, 357 71, H01L 2712

Patent

active

051327457

ABSTRACT:
A thin film transistor includes a two-layer gate metallization comprising a relatively thin first layer of a first conductor and a relatively thick second layer of a second conductor with the second conductor being capable of being etched with an etchant that produces substantially no etching of the first conductor layer. During device fabrication, the thick gate metallization layer (second conductor) is selectively etched until all of that material is removed in the openings in the mask. The thin lower layer (first conductor) is then etched with a minimum of etching into the substrate. The gate dielectric and subsequent layers deposited over this gate metallization have high integrity and highly reliable continuity because of the sloped nature of the gate metallization sidewalls, and because of the shallow gate metallization topography due to minimization of substrate etching during gate metallization patterning.

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R. J. Saia, B. Gorowitz, "The Reactive Ion Etching of Molybdenum and Bilayer Metallization Systems Containing Molybdenum", Journal of the Electrochemical Society, vol. 135, pp. 2795-2802 (1988) (See p. 2797 for discussion of one step Mo-Cr etching).

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