Sense amplifier having load device providing improved access tim

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

3072968, H03K 301, G01R 1900

Patent

active

051325764

ABSTRACT:
A current sense amplifier for an Erasable Programmable read only memory (EPROM) has an output node with a variable resistance PMOS transistor load device interconnected between a fixed voltage potential and the output node. A gate bias for the PMOS transistor load device is delayed whereby changes in conductance of the load device is delayed in response to a change in voltage on the output node. Access time for the sense amplifier is improved by the delayed change in conductance in the load device.

REFERENCES:
patent: 4644196 (1987-02-01), Flannagan
patent: 4695744 (1987-09-01), Giordano
patent: 4748349 (1988-05-01), McAlexander, III et al.
patent: 4845672 (1989-07-01), Watanabe et al.

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