Fishing – trapping – and vermin destroying
Patent
1987-06-24
1988-06-07
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437238, 20419237, H01L 21465
Patent
active
047496630
ABSTRACT:
In a process of fabricating a semiconductor IC having a plurality of metal wiring conductor layers on a semiconductor substrate and an insulation layer between the metal wiring conductor layers, the insulation layer being formed of a silicon oxide film is formed by means of RF bias-sputtering, a silicon oxide film is formed by means of RF bias sputtering under such a condition that the deposition rate and the etching rate on a pattern surface 45.degree. inclined with respect to the reference surface of the semiconductor substrate are equal, part of the silicon oxide film over the underlying metal wiring conductor layer being protruded; a trench is formed in part of the silicon oxide film covering the metal wiring conductor layer, and the silicon oxide is etched by RF bias sputtering under such a condition that the deposition rate and etching rate on a pattern surface parallel to the reference surface of the semiconductor substrate are equal, until the protrusion of the silicon oxide film over the metal wiring conductor is removed so that the entire silicon oxide film is planarized.
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patent: 4545852 (1985-10-01), Barton
patent: 4601781 (1986-07-01), Mercier et al.
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patent: 4690746 (1987-09-01), McInerney et al.
Kotani et al, "Sputter Etching Planarization . . . ", J. Electrochem. Soc., vol. 130, No. 3, 4/83, pp. 645-648.
Hearn Brian E.
McAndrews Kevin
OKI Electric Industry Co., Ltd.
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