Parallel/pipelined arithmetic variable clock frequency synthesiz

Details Parallel/pipelined arithmetic variable clock frequency synthesiz Parallel/pipelined arithmetic variable clock frequency synthesiz

1985-12-23

1988-08-23

Harkcom, Gary V.

Boots, shoes, and leggings

364718, G06F 102

Patent

active

047665602

ABSTRACT:
An arithmetic frequency synthesizer comprises one or more parallel/pipelined systolic computing arrays for performing parallel, recursive accumulation functions. Existing very large scale integrated circuit technology may be used to fabricate such arrays. Such a frequency synthesizer may be utilized, for example, to provide scan non-linearity correction, motor hunt compensation and/or polygon signature correction for laser scanners.

REFERENCES:
patent: 3772681 (1973-11-01), Skingle
patent: 3973209 (1976-08-01), Nossen et al.
patent: 4134072 (1979-01-01), Bolger
patent: 4328554 (1982-05-01), Mantione
Tierney, J., "Digital Frequency Synthesizers", Frequency Synthesis: Techniques and Applications, edited by J. Gorski-Popiel, IEEE Press, 1975, pp. 121-149.

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