Refresh and error detection and correction technique for a data

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371 13, G06F 1110, G11C 2900

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active

043808123

ABSTRACT:
A data processing system in which the bits of each stored word in a memory thereof are refreshed periodically. At substantially the same time the refresh operation with respect to each word occurs, an error detection operation also occurs and, if an error is detected in a word that is being refreshed, the error is then corrected and the corrected word is written back into the memory. Thus, errors are continuously being checked with no more use of machine time then is required for the refresh operation. Error correction, when necessary, then takes place at a fixed frequency, a limit thereby being placed on the error correction process. If errors in a work are detected when the word is requested for access by a requestor, the error is corrected before the word is supplied to the requestor but the corrected word is not written back into memory at that time, the word in memory being again detected and corrected at its next refresh operation.

REFERENCES:
patent: 4112513 (1978-09-01), Elsner
patent: 4175692 (1979-11-01), Watanabe
patent: 4183096 (1980-01-01), Cenker et al.
patent: 4216541 (1980-08-01), Clover et al.
patent: 4251863 (1981-02-01), Rothenberger
patent: 4255808 (1981-03-01), Schaber
patent: 4319356 (1982-03-01), Kocol et al.
Christensen and Pattin, Jr., Stuck-Track Error Correction, IBM Technical Disclosure Bulletin, vol. 13, No. 7, Dec. 1970, pp. 1844-1846.

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