Level clamp for Tri-state CMOS bus structure

Details Level clamp for Tri-state CMOS bus structure Level clamp for Tri-state CMOS bus structure

1987-02-27

1988-08-23

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307473, 307568, 307572, H03K 508, H03K 19003, H03K 19094

Patent

active

047663340

ABSTRACT:
A combination non-inverting driver and a resistor ensures the locking of a free floating bus line of a CMOS system into whatever logic state the bus line was last driven.

REFERENCES:
patent: 4158891 (1979-06-01), Fisher
patent: 4450370 (1984-05-01), Davis
patent: 4594519 (1986-06-01), Ohtani et al.

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