Data processor executing memory indirect addressing and register

Details Data processor executing memory indirect addressing and register Data processor executing memory indirect addressing and register

1990-05-04

1993-08-24

Shaw, Dale M.

Boots, shoes, and leggings

3642318, G06F 900, G06F 930, G06F 934, G06F 938

Patent

active

052396339

ABSTRACT:
A data processor which comprises a pipeline processing mechanism for executing memory indirect addressing and register indirect addressing in an address calculation stage, checks whether or not an instruction writes an operand to a memory or register, makes each stage of the pipeline mechanism hold reservation information thereof in sequence, thereby reduces the frequency of stops of pipeline processing caused by processing of operand address calculation of the following instruction attending on a writing of the operand of the preceding instruction to a memory or register, so that data processing can be execute at a higher efficiency.

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"Branch Prediction Strategies & Design," pp. 7-22 Computer, Jan. 1984.

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