Fishing – trapping – and vermin destroying
Patent
1990-04-20
1991-12-17
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 45, 437150, 437931, 148DIG26, H01L 21266
Patent
active
050735128
ABSTRACT:
On a semiconductor substrate, a thin insulating film to be used as a gate insulating film, a thin polysilicon film and a thick mask layer are formed in the order and an opening for gate electrode formation is formed in the mask layer. After an ion implantation of impurities having the same conductivity type as that of the substrate is performed thereto through the opening to form, in the substrate, an impurity region having the same conductivity type as and impurity density larger than that of the substrate, the opening is filled with electrically conductive material. Thereafter, the mask layer is removed and an exposed first polysilicon film is removed to form a gate electrode comprising the conductive material and an underlying portion of the polysilicon film. Then, source region and drain region are formed in self-aligned manner with respect to the gate electrode.
REFERENCES:
patent: 4145233 (1979-03-01), Sefick et al.
patent: 4514893 (1985-05-01), Kinsbron
patent: 4895520 (1990-01-01), Berg
Wolf, S., Silicon Processing for the VLSI Era, pp. 384-387, 1986.
Chaudhari C.
Hearn Brian E.
NEC Corporation
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