Boots – shoes – and leggings
Patent
1982-06-30
1985-06-04
Shaw, Gareth D.
Boots, shoes, and leggings
G06F 1100
Patent
active
045218528
ABSTRACT:
A data processing device fabricated on a single semiconductor substrate including nonvolatile memory for the storage of data and instructions, a central processing unit for performing operations on the data, both connected to an information transfer bus to transfer addresses, instructions and data between the memory and the central processing unit. Further included is an external interface connected to the information bus for providing information on the information bus to external devices. Security bits are also provided for designating the security status of information stored in the memory. Address logic is provided that is connected to the information bus to determine when information in the memory is being accessed. An external interface inhibit logic circuit is provided that is connected to the security bit and the address logic to selectively inhibit the operation of the external interface.
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Lee Jameson
Marshall, Jr. Robert D.
Merrett N. Rhys
Sharp Melvin
Shaw Gareth D.
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